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Computer Scientist - EDA Algorithm Researcher

Information Sciences Institute Arlington, Virginia

Information Sciences Institute (ISI), a unit of USC’s Viterbi School of Engineering, is a world leader in the research and development of advanced information processing, computing, and communications technologies. ISI operates one of the world’s largest academic high-performance computing clusters. ISI has three research campuses:  one in Marina Del Rey, CA; one in Arlington, VA; and one in Waltham, MA.

*This position is located in Arlington, VA.*

The Reconfigurable Computing Group at the University of Southern California’s Information Sciences Institute is a long-time pioneer of research investigating Field Programmable Gate Arrays. Spanning the days of homogeneous logic devices to today’s billion transistor System on Chip devices, RCG has led the way from being the first to implement application level partial runtime reconfiguration, investigating 3D FPGA architectures, developing Autonomous System on Chip architectures, releasing open source CAD tools which target real physical devices, IP to address software / hardware co-design complexity and continues today with research ranging from developing programming models for next generation industry devices to conducting experiments on the International Space Station. Today, RCG is addressing our nation’s challenges in big data, hardware cybersecurity, trusted systems, cognitive radio and more.

USC/ISI is looking for highly talented, motivated researchers to lead and impact state of the art research and development in the area of reconfigurable computing. This position will lead research in algorithm development for custom internal tools which target FPGA and ASIC front end design. These tools solve challenging problems in hardware security, high level abstraction for hardware design, and machine learning acceleration for critical systems.  Develop and realize effectiveness of solutions on physical FPGAs and custom ASIC fabrication. Lead research, propose major innovations, collaborate with peers within the group and across ISI, publish results in top tier conferences, and contribute to or lead proposals.

Required Job Qualifications

  • Qualified candidates for this position must be willing and eligible to obtain and maintain a collateral Secret clearance. Eligibility for this clearance requires U.S. citizenship. Current SECRET clearance or higher is a plus.
  • PhD in Computer Engineering, Electrical Engineering, or Computer Science required.
  • Experience developing high level algorithms for FPGA or ASIC design such as High Level Synthesis, Machine Learning, and Graph partitioning required.
  • Solid understanding of CAD algorithms, including design space exploration (SAT, MILP), synthesis, partitioning, mapping, placing, and routing.
  • Expert level use of Xilinx or Intel FPGA implementation tools.
  • Proficiency in hardware development in VHDL or Verilog, or SystemC or SystemVerilog.
  • Five years of C++/Java and Python development experience, including contributions to large-scale software projects, commercial or open-source.
  • Previous publications, patents, or innovations related to FPGA productivity, CAD or EDA algorithms and tools.

Preferred Job Qualifications

  • Experience with Model Checking, compositional verification, interface synthesis, or algorithmic game theory desired.
  • Experience with Torc, RapidWrite, ABC, VPR, VTR, RapidSmith, GoAhead, or similar tools a plus.
  • Experience leading or contributing to proposals a significant plus.

The University of Southern California values diversity and is committed to equal opportunity in employment.


Minimum Education: Master's degree, Combined experience/education as substitute for minimum education Minimum Experience: 3 years Minimum Field of Expertise: Knowledge of research processes and computer science.


REQ20060535 Posted Date: 02/13/2019
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