Skip Navigation

Search all jobs

Let’s change the world together!

USC is a leading private research university located in Los Angeles – a global center for arts, technology and international business. As the city’s largest private employer, responsible for more than $8 billion annually in economic activity in the region, we offer the opportunity to work in a dynamic and diverse environment, in careers that span a broad spectrum of talents and skills across a variety of academic schools and units. As a USC employee, you will enjoy excellent benefits and perks, and you will be a member of the Trojan Family - the faculty, staff, students and alumni who make USC a great place to work. Think you’ve got what it takes to join us? We invite you to search our open positions and apply!

night image of dusk commons night image of dusk commons

Lead Research Engineer - Reconfigurable Computing

Viterbi School of Engineering Arlington, Virginia

USC’s Information Sciences Institute (ISI), a unit of the university’s Viterbi School of Engineering, is a world leader in the research and development of advanced artificial intelligence, information processing, computing, cybersecurity, and communications technologies. ISI’s 350 faculty, professional staff and graduate students carry out extraordinary information sciences research at three distinct locations - Marina Del Rey, CA; Arlington, VA; and Waltham, MA.

*This position is located in Arlington, VA.  Remote & hybrid work options are available.*

The Reconfigurable Computing Group (RCG) at ISI is a leader in disrupting and advancing the fields of front-end ASIC and FPGA design, computer architecture, and EDA tools. As an applied research lab, our work spans the creation and maturation of ideas from academic conception to applied research prototypes.

RCG staff can be found:

  • Researching and developing toolsets to map AI algorithms directly to hardware,
  • Optimizing full scale testing of billion transistor FPGAs to minimal runtime,
  • Performing experiments on the International Space Station,
  • Utilizing ISI’s MOSIS service to fabricate novel computer architectures.

Our success is based on investing in our staff through a culture centered on:

  • Learning and idea generation with transparent and constructive feedback
  • Continual career growth through contributing to, creating, and leading a research agenda

We are looking for highly talented, motivated developers to perform research and development in the area of digital design and CAD tools for ASIC and FPGA hardware. This position will collaborate with a high caliber team to research and develop cutting edge solutions in reconfigurable architectures, design tools, and hardware security. Be an active member of a fast-paced Front-end Research and Development team supporting architecture definition, custom EDA tool development and realization on ASICs and FPGAs. This position will lead development, propose major innovations, collaborate with peers within the group and across ISI, and contribute to proposals and publications in top tier conferences.

JOB ACCOUNTABILITIES:

  • Implements research project solutions in one or more programming languages to meet technical needs. Maintains currency with and applies best practices in design, implementation, and engineering. Oversees implementation of solutions to targeted research systems issues and tools to support project goals. Leads and provides feedback on technical implementation of others. Provides technical contributions in diverse areas to systems to which they are the primary developer and in areas in which they are brought on to consult. 
  • Translates domain-specific needs into implemented solutions. Applies domain-specific knowledge, gained from independent research, to implement project solutions. Demonstrates domain expertise and technical contributions in several related research areas. Reviews and evaluates results and conclusions of research projects.
  • Works as a member of a team, collaborating closely with supervisor(s) on technical progress and challenges. Provides guidance on technical decisions for assigned projects and projects in related areas. Establishes best practices within and/or across projects.
  • Summarizes progress for project reports. Leads and/or participates in meetings with external collaborators and/or cross-group meetings about program-level direction, serving as sole team representative as appropriate. Presents the work of the team as a whole to external audiences. Writes or assists in writing grant proposals as appropriate.
  • Learns new technology required to support project goals via tutorials, reading research publications and/or attending appropriate conferences. Stays informed of new developments and technologies by reading and contributing to journals and other pertinent publications and participating in professional meetings and workshops.
  • Promotes an environment that fosters inclusive relationships and creates unbiased opportunities for contributions through ideas, words, and actions that uphold principles of the USC Code of Ethics.
  • Performs other related duties as assigned or requested.  The university reserves the right to add or change duties at any time.

REQUIRED QUALIFICATIONS / EXPERIENCE

  • Knowledge of computer architecture, reconfigurable computing (FPGAs) and relevant programming languages (System Verilog, VHDL, C/C++, Python).
  • Experience with CAD algorithms and tools for ASIC or FPGAs, test and verification, hardware security, or hardware machine learning.
  • Prior experience with Digital Design and standard ASIC or FPGA tools (Synopsys Design Compiler, Cadence Stratus, Xilinx Vivado, Intel Quartus).
  • Proven leadership ability. Excellent written and oral communication skills.
  • Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. Citizenship.

PREFERRED QUALIFICATIONS / EXPERIENCE

  • M.S. Degree in Electrical and Computer Engineering or equivalent.
  • Experience in digital logic verification and/or model checking tools such as Synopsys Formality or Cadence Conformal.
  • Previous patents, publications, or other demonstration of innovations in digital design.

The University of Southern California values diversity and is committed to equal opportunity in employment.


Minimum Education: Master's degree Minimum Experience: 10 years Minimum Skills: Knowledge of computer architecture, reconfigurable computing (FPGAs) and relevant programming languages (System Verilog, VHDL, C/C++, Python). Experience with CAD algorithms and tools for ASIC or FPGAs, test and verification, hardware security, or hardware machine learning. Prior experience with Digital Design and standard ASIC or FPGA tools (Synopsys Design Compiler, Cadence Stratus, Xilinx Vivado, Intel Quartus). Proven leadership ability. Excellent written and oral communication skills.


REQ20113000 Posted Date: 08/10/2022

Job matching

With just one click and a connection to LinkedIn, we can connect you with jobs that match your work experience.

Start matchingto jobs with your LinkedIn account

Stay connected with University of Southern California

Sign up to receive job alerts

Select interests

Recently added jobs