Microelectronics Fabrication Engineer

The Information Sciences Institute (ISI) is a vibrant, path-breaking research institute, and a strong component of USC’s Viterbi School of Engineering. ISI performs traditional basic and applied research, combined with education and building of operational systems. It provides an academic environment that supports researchers setting their own agendas to address important research problems in computer science, electrical engineering, mathematics, and applied physics.

Funded by the CHIPS and Science Act, the Microelectronics Commons program is a network of regional technology hubs acting on a shared mission: to expand the nation’s global leadership in microelectronics.  Through this program, the Microelectronics Commons program is accelerating domestic prototyping and growing a pipeline of U.S. based semiconductor talent.  USC ISI will serve as the lead hub in this project.

For more information about this CA DREAMS Project, please click on this link:

http://www.ca-dreams.org

This role is hybrid in nature (2-3 days in the office).  The incumbent must live within a reasonable commutable distance to the Marina del Rey, CA office.

Job Description

The California Defense Ready Electronics and Microdevices Superhub (California DREAMS) will promote innovation and lab-to-fab transition for RF and other technologies in the Southern California region. MOSIS 2.0 will play a critical role in providing access to university nanofabs and industry prototyping and production fabs in support of rapid prototyping for Government- and Industry-funded R&D projects. The primary end uses for the service span advanced RF-spectrum communications and sensing applications such as 5G/6G and related domains. The Prototype Integration and Engineering Services (PIES) team will operate within MOSIS 2.0 to provide engineering support for users bridging the valley between innovations and production. MOSIS 2.0 PIES team is hiring engineers that will be part of a core team at USC/ISI complemented by a distributed team at our partner university labs and industry fabs.

Responsibilities:

• The PIES team will maintain knowledge of full and partial process flows across our partner facilities and will support users, technologies, and facilities.
• Potential projects will range from short turnaround (days) unit processes to longer, more complicated multi-step prototyping, to full flow pre-production projects.
• The PIES team will work with users and will provide prefabrication design training and services, followed by development of a nano-fab processing plan, and then execution of that plan.
• The engineering team will ensure that appropriate process control and trouble-shooting analytics are captured and oversee any required in-situ and post process metrology and wafer/chip evaluation steps.

MOSIS 2.0 is looking for team members with experience in the following:

• Comprehensive knowledge/proficiency in materials growth and characteristics of compound semiconductors (e.g., GaN, InP, GaAs) and Silicon.
• Handson experience in various processes in a cutting-edge nanofabrication facility, including but not limited to lithography, deposition, etching, and metrology.
• Solid background in device and analog design
• Hands-on experience with the Fabrication tools and recipes
• Defect metrology and yield
• Intellectual property Library development
• Mixed signal and system-on-a-chip (SoC) design
• Recipe and process development
• PDK and ADK development

Minimum Requirements:

• Minimum of bachelor’s degree in electrical engineering, materials science, physics, or related degree covering fundamentals of microelectronics engineering principles and fabrication technologies.
• Experience spanning the range of wide bandgap compound semiconductor processes found in modern microelectronic fabrication facilities.
• The successful candidate is expected to have previous hands-on experience in the full range of full and partial processes found in a state-of-the-art nano-fabrication facility, including lithography, deposition, etching, and metrology.

Preferred Qualifications and Skills

• Bachelor’s or master’s degree in electrical engineering,
• 3 years of nanofabrication experience
• Previous experience in the design and fabrication of compound semiconductor-based devices is preferred, and experience with Silicon-based fabrication and integration will also be valuable.

The annual base salary range for this position is $155,749 - $192,481. When extending an offer of employment, the University of Southern California considers factors such as (but not limited to) the scope and responsibilities of the position, the candidate’s work experience, education/training, key skills, internal peer equity, federal, state and local laws, contractual stipulations, grant funding, as well as external market and organizational considerations.

*The University of Southern California values diversity and is committed to equal opportunity in employment.*

Minimum Education: Bachelor's degree Additional Education Requirements Combined experience/education as substitute for minimum education Minimum Experience: 5 years Minimum Skills: Thorough knowledge of device physics and VLSI electrical engineering principles at the device and circuit level. Working knowledge of electronic semiconductor test equipment, CAD tools, and other engineering software tools.